1. Field of Invention
The invention relates to a system for and method to determine resist recess depth in-situ in trench cell DRAM capacitors, using FTIR (Fourier Transform Infrared Reflectometry) in combination with a fast photoconductive IR detector to determine an end point. The method is independent of ground rules and therefore extendible for ground rules smaller than 0.175 xcexcm.
2. Description of Related Art
Good recess depth control for the resist recess in trench cell DRAM (Dynamic Range and Access Memory) capacitors requires a non-destructive in-situ depth measurement; however, there is no current method available which is extendible to ground rules for microelectronic sub devices smaller than about 0.175 xcexcm.
U.S. Pat. No. 4,977,330 disclose an xe2x80x9cin-linexe2x80x9d photoresist thickness measuring device wherein a plurality of projection optical fibers are disposed over a wafer processing track for illuminating portions of a wafer as the wafer proceeds along the track. The spectrometer simultaneously diffuses the scattered light into a plurality of light bands, each light band having a different wavelength. The electrical signals generated by each pin diode in response to the incident light bands are communicated to a processor which calculates resist thickness for each illuminated portion of the wafer.xe2x80x9d xe2x80x9cThe software loads reflectivity data from the spectrometer into the computer""s memory, and optionally subtracts a background spectrum from the data.xe2x80x9d (Col. 4, lines 35-37). xe2x80x9cThe spectrum data is converted into the frequency domain by a Fourier transform . . . Theoretical considerations reveal that the correct thickness will correspond to the largest value of the power spectrum of the Fourier transform.xe2x80x9d (Col.5, lines 9-26).
A method for xe2x80x9cthe spin development of a resist coating on the surface of a semiconductor wafer is monitored by measuring light scattered back from the wafer surface from an incandescent source in U.S. Pat. No. 4,647,172. During development, the sensed light level oscillates due to optical fringing caused by the thinning of the resist layer in the exposed areas and the fringe generated oscillation essentially stops when the development breaks through in the exposed areas.xe2x80x9d xe2x80x9c[The] data stream representing the light scattered back from the wafer under development is compared with reference data representing a template characteristic of the optical fringes generated by a representative development process to determine a control point which characterizes a last fringe in the development process. The development process is then terminated a calculated time after the control point.xe2x80x9d (Col. 3, lines 25-33.)
A method for processing a layer of material while using in-situ monitoring and control is disclosed in U.S. Pat. No. 5,372,673. FIG. 17 disclose xe2x80x9ca wafer which has a plasma enhanced oxide (PEO) portion, referred to as a dielectric portion and a photoresist portion. The wafer is positioned in a chamber of a semiconductor equipment system. The system is a batch etch system. Wafer 51 is a dummy etch monitoring wafer and other product wafers are positioned within the chamber adjacent the wafer 51 . . . A photoresist layer or a like layer which is similar or identical to the portion of 52 of wafer 51 is formed over the product wafers. This photoresist layer is formed over the layer of material and is used to achieve in-situ controlled etch-back planarization . . . . The laser beam reflection off of the surface of wafer 51 generates a sinusoidal interference pattern which can be used during etch processing to determine the etch rate of the portion 52 (i.e., the photoresist portion). The etch rate information is transmitted to the computer 60 via the conductor 63. The computer 60 uses the data received from the photodetectors 54a and 54b to alter the process conditions, process time, process environment, and/or process chemistry . . . xe2x80x9d (Col. 11, line 40xe2x80x94Col. 12, line 16). xe2x80x9cIt should be understood that the dummy wafer 51 may also be a product wafer. The laser 58a may be positioned to monitor a first area of the product wafer, which is likely to expose the dielectric layer requiring planarization. The laser 58b may be positioned to monitor a second area of the product wafer which exposes predominantly photoresist. The same optimal planarization results via feedback control is achieved.xe2x80x9d (Col. 12, line 26-34).
U.S. Pat. No. 5,807,761 discloses a method for real-time in-situ monitoring of a trench formation process. xe2x80x9cIn the manufacturing of 16 Mbit DRAM chips, the deep trench formation process in a silicon wafer by plasma etching is a very critical step . . . A large area of the wafer is illuminated through a view port by a radiation of a specified wavelength at a normal angle of incidence. The reflected light is collected then applied to a spectrometer.xe2x80x9d
The resist recess process for DRAM trench cell capacitors determines the buried plate depth; however, there is a need for an end-point detection system for ground rules of microelectronic devices of 0.175 xcexcm and smaller to control the recess etch process, which is extendible to ground rules smaller than 0.175 xcexcm, and is therefore independent of ground rules.
One object of the present invention is to provide a method for determining recess depth control for the resist recess in trench cell DRAM capacitors in a non-destructive in-situ depth measurement.
Another object of the present invention is to provide a method for obtaining recess depth control for the resist recess in trench cell DRAM capacitors that is a non-destructive in-situ depth measurement which is extendible to ground rules of microelectronic devices smaller than 0.175 xcexcm.
A further object of the present invention is to provide a method for recess depth control for the resist recess in trench cell DRAM capacitors that is a non-destructive in-situ depth measurement, that is extendible to ground rules smaller than 0.175 xcexcm using FTIR reflectometry in combination with a fast photoconductive IR detector to measure resist recess depth in-situ during processing so that an end-point detection can be determined.
In general, the invention method for measuring the end point of the resist recess etch process and monitoring the etch rate is accomplished by placing an FTIR system on the etch chamber in tandem with utilizing IR light reflected from the processed wafer after the resist recess etch. The system used determines the resist recess depth for depth values  greater than 0.5 xcexcm at any time, independent of the actual etch rate by reflection spectra from the wafer.